Everything from $(shell ...)
stdout goes into its result. You cannot let it go to stdout, and then take some other stdout as a function result.
You can redirect the script's output to stderr. This may or may not be suitable, depending on how you use your makefile.
Let me suggest a more dramatic change.
Calling recursive make
from $(shell)
is a sign of an overcomplicated process. Let's at least make it idiomatic: let's generate an include
d makefile with a proper value. This will rebuild it if it's not present.
include $(BUILD_PATH)/filelist.mk
$(BUILD_PATH)/filelist.mk:
# A normal recursive call. Its output goes to stdout.
make -C $(SCRIPT_PATH)
# Assuming that filelist.txt can only include a list of
# existing files, and no malicious injected code.
echo "define VHDL_SOURCES" > $@
cat $(BUILD_PATH)/filelist.txt >> $@
echo "endef" >> $@
Bonus: if you can set a proper dependencies for filelist.mk
, it will only be rebuilt when these dependencies change.
If you want it to always rebuild (which is probably not necessary), make it phony:
.PHONY: $(BUILD_PATH)/filelist.mk
After the file is generated, make
will restart its run with the new included file.
与恶龙缠斗过久,自身亦成为恶龙;凝视深渊过久,深渊将回以凝视…