A case
statement is commonly used in such situations:
module disp
(
output logic [3:0]en, //7 segment digit selector
output logic a,b,c,d,e,f,g, //7 segment display
input logic [1:0] x //button input
);
always_comb begin
case (x)
2'b11 : {en,a,b,c,d,e,f,g} = {4'b1000,7'h01};
2'b10 : {en,a,b,c,d,e,f,g} = {4'b0100,7'h0f};
2'b01 : {en,a,b,c,d,e,f,g} = {4'b0010,7'h01};
2'b00 : {en,a,b,c,d,e,f,g} = {4'b0001,7'h01};
endcase
end
endmodule
You are correct: you can not use the assign
keyword multiple times to the same signal.
Here is a version with an array which simulates the same as the case
:
module disp
(
output logic [3:0]en, //7 segment digit selector
output logic a,b,c,d,e,f,g, //7 segment display
input logic [1:0] x //button input
);
logic [10:0] lut [4] = {{4'b001,7'h01}, {4'b0010,7'h01}, {4'b0100,7'h0f}, {4'b1000,7'h01}};
always_comb begin
{en,a,b,c,d,e,f,g} = lut[x];
end
endmodule
I rearranged the values in the array to match the case
.